wehub-resource-sync
91 lines
3.0 KiB
Plaintext
91 lines
3.0 KiB
Plaintext
//
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// CutlassDeconvCommonExecution.cu
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// MNN
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//
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// Created by MNN on 2023/04/25.
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// Copyright © 2018, Alibaba Group Holding Limited
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//
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#include "CutlassDeconvCommonExecution.hpp"
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namespace MNN {
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namespace CUDA {
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CutlassDeconvCommonExecution::CutlassDeconvCommonExecution(Backend *backend) : Execution(backend) {
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mBackendPtr = backend;
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}
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ErrorCode CutlassDeconvCommonExecution::runCutlassGemmFunc() {
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// Do Gemm Compute
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if(mFp32Infer) {
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if(mActivationType == 1) {
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cutlass::Status status = mGemmCudaF32F32Relu();
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cutlass_check(status);
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} else if(mActivationType == 2) {
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cutlass::Status status = mGemmCudaF32F32Relu6();
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cutlass_check(status);
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} else {
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cutlass::Status status = mGemmCudaF32F32Ln();
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cutlass_check(status);
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}
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} else {
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if(mGpuComputeCap < 75) {
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if(mActivationType == 1) {
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if(mFp16Fp32MixInfer) {
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cutlass::Status status = mGemmCudaF16F32Relu();
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cutlass_check(status);
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} else {
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cutlass::Status status = mGemmCudaF16F16Relu();
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cutlass_check(status);
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}
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} else if(mActivationType == 2) {
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if(mFp16Fp32MixInfer) {
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cutlass::Status status = mGemmCudaF16F32Relu6();
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cutlass_check(status);
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} else {
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cutlass::Status status = mGemmCudaF16F16Relu6();
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cutlass_check(status);
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}
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} else {
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if(mFp16Fp32MixInfer) {
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cutlass::Status status = mGemmCudaF16F32Ln();
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cutlass_check(status);
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} else {
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cutlass::Status status = mGemmCudaF16F16Ln();
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cutlass_check(status);
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}
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}
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} else {
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if(mActivationType == 1) {
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if(mFp16Fp32MixInfer) {
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cutlass::Status status = mGemmF16F32ReluSm75();
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cutlass_check(status);
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} else {
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cutlass::Status status = mGemmF16F16ReluSm75();
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cutlass_check(status);
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}
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} else if(mActivationType == 2) {
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if(mFp16Fp32MixInfer) {
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cutlass::Status status = mGemmF16F32Relu6Sm75();
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cutlass_check(status);
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} else {
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cutlass::Status status = mGemmF16F16Relu6Sm75();
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cutlass_check(status);
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}
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} else {
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if(mFp16Fp32MixInfer) {
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cutlass::Status status = mGemmF16F32LnSm75();
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cutlass_check(status);
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} else {
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cutlass::Status status = mGemmF16F16LnSm75();
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cutlass_check(status);
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}
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}
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}
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}
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return NO_ERROR;
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}
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} // namespace CUDA
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} // namespace MNN
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