wehub-resource-sync
130 lines
3.2 KiB
ArmAsm
130 lines
3.2 KiB
ArmAsm
#ifdef __aarch64__
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#include "MNNAsmGlobal.h"
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.text
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.align 5
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.macro SET_0 s0, s1, s2, s3
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movi \s0\().4s, #0
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movi \s1\().4s, #0
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movi \s2\().4s, #0
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movi \s3\().4s, #0
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.endm
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.macro Int32_To_Float32 s0, s1, s2, s3
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scvtf \s0\().4s, \s0\().4s
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scvtf \s1\().4s, \s1\().4s
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scvtf \s2\().4s, \s2\().4s
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scvtf \s3\().4s, \s3\().4s
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.endm
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asm_function MNNSumWeightInt8Arm86
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// void MNNSumWeightInt8Arm86(float* kernelsum, int8_t* source, size_t outside, size_t reduceAxis, size_t hP, size_t lP)
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// auto load: x0: dest, x1: source, x2: outside, x3: reduceAxis, x4: hP, x5: lP
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// weight shape: [outside, axis, hP, lP]
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// outside = blocknum * hU
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// reduceAxis = kernelCount * lU
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stp d14, d15, [sp, #-64]!
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stp d12, d13, [sp, #16]
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stp d10, d11, [sp, #32]
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stp d8, d9, [sp, #48]
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movi v31.16b, #1
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Loop:
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mov x5, x3
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SET_0 v16, v17, v18, v19
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SET_0 v20, v21, v22, v23
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LU4:
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cmp x5, #4
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blt LU2
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ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x1], #64
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ld1 {v4.16b, v5.16b, v6.16b, v7.16b}, [x1], #64
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ld1 {v8.16b, v9.16b, v10.16b, v11.16b}, [x1], #64
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ld1 {v12.16b, v13.16b, v14.16b, v15.16b}, [x1], #64
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// kernel sum
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.inst 0x4e80a7f0 // smmla v16.4s, v31.16b, v0.16b
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.inst 0x4e81a7f1 // smmla v17.4s, v31.16b, v1.16b
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.inst 0x4e82a7f2 // smmla v18.4s, v31.16b, v2.16b
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.inst 0x4e83a7f3 // smmla v19.4s, v31.16b, v3.16b
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.inst 0x4e84a7f4 // smmla v20.4s, v31.16b, v4.16b
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.inst 0x4e85a7f5 // smmla v21.4s, v31.16b, v5.16b
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.inst 0x4e86a7f6 // smmla v22.4s, v31.16b, v6.16b
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.inst 0x4e87a7f7 // smmla v23.4s, v31.16b, v7.16b
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.inst 0x4e88a7f0 // smmla v16.4s, v31.16b, v8.16b
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.inst 0x4e89a7f1 // smmla v17.4s, v31.16b, v9.16b
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.inst 0x4e8aa7f2 // smmla v18.4s, v31.16b, v10.16b
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.inst 0x4e8ba7f3 // smmla v19.4s, v31.16b, v11.16b
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.inst 0x4e8ca7f4 // smmla v20.4s, v31.16b, v12.16b
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.inst 0x4e8da7f5 // smmla v21.4s, v31.16b, v13.16b
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.inst 0x4e8ea7f6 // smmla v22.4s, v31.16b, v14.16b
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.inst 0x4e8fa7f7 // smmla v23.4s, v31.16b, v15.16b
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sub x5, x5, #4
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cmp x5, #4
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bge LU4
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cbz x5, LUEnd
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b LU4
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LU2:
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cmp x5, #2
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blt LU1
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ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x1], #64
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ld1 {v4.16b, v5.16b, v6.16b, v7.16b}, [x1], #64
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// kernel sum
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.inst 0x4e80a7f0 // smmla v16.4s, v31.16b, v0.16b
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.inst 0x4e81a7f1 // smmla v17.4s, v31.16b, v1.16b
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.inst 0x4e82a7f2 // smmla v18.4s, v31.16b, v2.16b
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.inst 0x4e83a7f3 // smmla v19.4s, v31.16b, v3.16b
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.inst 0x4e84a7f4 // smmla v20.4s, v31.16b, v4.16b
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.inst 0x4e85a7f5 // smmla v21.4s, v31.16b, v5.16b
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.inst 0x4e86a7f6 // smmla v22.4s, v31.16b, v6.16b
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.inst 0x4e87a7f7 // smmla v23.4s, v31.16b, v7.16b
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sub x5, x5, #2
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cbz x5, LUEnd
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b LU2
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LU1: // outside
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cbz x5, LUEnd
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ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x1], #64
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.inst 0x4e80a7f0 // smmla v16.4s, v31.16b, v0.16b
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.inst 0x4e81a7f1 // smmla v17.4s, v31.16b, v1.16b
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.inst 0x4e82a7f2 // smmla v18.4s, v31.16b, v2.16b
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.inst 0x4e83a7f3 // smmla v19.4s, v31.16b, v3.16b
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LUEnd:
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add v16.4s, v16.4s, v20.4s
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add v17.4s, v17.4s, v21.4s
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add v18.4s, v18.4s, v22.4s
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add v19.4s, v19.4s, v23.4s
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zip1 v0.2d, v16.2d, v17.2d
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zip1 v1.2d, v18.2d, v19.2d
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scvtf v0.4s, v0.4s
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scvtf v1.4s, v1.4s
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st1 {v0.4s, v1.4s}, [x0], #32
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subs x2, x2, #1 // outside--
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bne Loop
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End:
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ldp d8, d9, [sp, #48]
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ldp d10, d11, [sp, #32]
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ldp d12, d13, [sp, #16]
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ldp d14, d15, [sp], #64
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ret
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#endif
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