wehub-resource-sync
139 lines
3.2 KiB
ArmAsm
139 lines
3.2 KiB
ArmAsm
#ifdef __aarch64__
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#include "MNNAsmGlobal.h"
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.text
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.align 5
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.macro SET_0 s0, s1, s2, s3
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movi \s0\().4s, #0
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movi \s1\().4s, #0
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movi \s2\().4s, #0
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movi \s3\().4s, #0
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.endm
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.macro Int32_To_Float32 s0, s1, s2, s3
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scvtf \s0\().4s, \s0\().4s
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scvtf \s1\().4s, \s1\().4s
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scvtf \s2\().4s, \s2\().4s
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scvtf \s3\().4s, \s3\().4s
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.endm
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asm_function MNNSumWeightInt8Arm82
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// void MNNSumWeightInt8Arm82(float* kernelsum, int8_t* source, size_t outside, size_t reduceAxis, size_t hP, size_t lP)
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// auto load: x0: dest, x1: source, x2: outside, x3: reduceAxis, x4: hP, x5: lP
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// weight shape: [outside, axis, hP, lP]
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// outside = blocknum * hU
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// reduceAxis = kernelCount * lU
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stp d14, d15, [sp, #-64]!
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stp d12, d13, [sp, #16]
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stp d10, d11, [sp, #32]
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stp d8, d9, [sp, #48]
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movi v31.16b, #1
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Loop:
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mov x5, x3
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SET_0 v16, v17, v18, v19
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LU8:
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cmp x5, #8
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blt LU4
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ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x1], #64
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ld1 {v4.16b, v5.16b, v6.16b, v7.16b}, [x1], #64
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ld1 {v8.16b, v9.16b, v10.16b, v11.16b}, [x1], #64
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ld1 {v12.16b, v13.16b, v14.16b, v15.16b}, [x1], #64
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// kernel sum
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.inst 0x4e8097f0 // sdot v16.4s, v31.16b, v0.16b
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.inst 0x4e8197f1 // sdot v17.4s, v31.16b, v1.16b
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.inst 0x4e8297f2 // sdot v18.4s, v31.16b, v2.16b
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.inst 0x4e8397f3 // sdot v19.4s, v31.16b, v3.16b
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.inst 0x4e8497f0 // sdot v16.4s, v31.16b, v4.16b
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.inst 0x4e8597f1 // sdot v17.4s, v31.16b, v5.16b
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.inst 0x4e8697f2 // sdot v18.4s, v31.16b, v6.16b
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.inst 0x4e8797f3 // sdot v19.4s, v31.16b, v7.16b
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.inst 0x4e8897f0 // sdot v16.4s, v31.16b, v8.16b
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.inst 0x4e8997f1 // sdot v17.4s, v31.16b, v9.16b
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.inst 0x4e8a97f2 // sdot v18.4s, v31.16b, v10.16b
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.inst 0x4e8b97f3 // sdot v19.4s, v31.16b, v11.16b
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.inst 0x4e8c97f0 // sdot v16.4s, v31.16b, v12.16b
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.inst 0x4e8d97f1 // sdot v17.4s, v31.16b, v13.16b
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.inst 0x4e8e97f2 // sdot v18.4s, v31.16b, v14.16b
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.inst 0x4e8f97f3 // sdot v19.4s, v31.16b, v15.16b
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sub x5, x5, #8
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cmp x5, #8
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bge LU8
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cbz x5, LUEnd
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b LU8
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LU4:
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cmp x5, #4
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blt LU2
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ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x1], #64
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ld1 {v4.16b, v5.16b, v6.16b, v7.16b}, [x1], #64
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// kernel sum
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.inst 0x4e8097f0 // sdot v16.4s, v31.16b, v0.16b
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.inst 0x4e8197f1 // sdot v17.4s, v31.16b, v1.16b
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.inst 0x4e8297f2 // sdot v18.4s, v31.16b, v2.16b
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.inst 0x4e8397f3 // sdot v19.4s, v31.16b, v3.16b
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.inst 0x4e8497f0 // sdot v16.4s, v31.16b, v4.16b
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.inst 0x4e8597f1 // sdot v17.4s, v31.16b, v5.16b
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.inst 0x4e8697f2 // sdot v18.4s, v31.16b, v6.16b
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.inst 0x4e8797f3 // sdot v19.4s, v31.16b, v7.16b
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sub x5, x5, #4
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cmp x5, #4
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bge LU4
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cbz x5, LUEnd
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b LU4
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LU2:
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cmp x5, #2
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blt LU1
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ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x1], #64
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// kernel sum
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.inst 0x4e8097f0 // sdot v16.4s, v31.16b, v0.16b
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.inst 0x4e8197f1 // sdot v17.4s, v31.16b, v1.16b
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.inst 0x4e8297f2 // sdot v18.4s, v31.16b, v2.16b
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.inst 0x4e8397f3 // sdot v19.4s, v31.16b, v3.16b
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sub x5, x5, #2
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cbz x5, LUEnd
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b LU2
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LU1: // outside
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cbz x5, LUEnd
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ld1 {v0.16b, v1.16b}, [x1], #32
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.inst 0x4e8097f0 // sdot v16.4s, v31.16b, v0.16b
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.inst 0x4e8197f1 // sdot v17.4s, v31.16b, v1.16b
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LUEnd:
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add v16.4s, v16.4s, v18.4s
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add v17.4s, v17.4s, v19.4s
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scvtf v16.4s, v16.4s
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scvtf v17.4s, v17.4s
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st1 {v16.4s, v17.4s}, [x0], #32
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subs x2, x2, #1 // outside--
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bne Loop
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End:
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ldp d8, d9, [sp, #48]
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ldp d10, d11, [sp, #32]
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ldp d12, d13, [sp, #16]
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ldp d14, d15, [sp], #64
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ret
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#endif
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