wehub-resource-sync
122 lines
2.1 KiB
ArmAsm
122 lines
2.1 KiB
ArmAsm
//
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// MNNConvRunForUnitDepthWiseUint8.S
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// MNN
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//
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// Created by MNN on 2018/10/25.
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// Copyright © 2018, Alibaba Group Holding Limited
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//
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#ifdef __aarch64__
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#include "MNNAsmGlobal.h"
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.text
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.align 5
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/*
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struct MNN::ConstConvolutionParameter
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{
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size_t kw;
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size_t kh;
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size_t weight_y_step;
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size_t dilate_x_step;
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size_t dilate_y_step;
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size_t stride_x_step;
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int32_t output_multiplier;
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int32_t output_shift_before;
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int32_t output_shift_after;
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int32_t output_offset;
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int32_t output_activation_min;
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int32_t output_activation_max;
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};
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*/
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asm_function MNNConvRunForUnitDepthWiseUint8
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//void MNNConvRunForUnitDepthWiseUint8(uint8_t* dst, const int16_t* src, const int16_t* weight,
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//size_t fw, size_t fh,
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//const MNN::ConstConvolutionParameter* parameter,
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//const int32_t* bias_data)
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//x0: dst, x1: src, x2: weight, x3:fw
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//x4: fh, x5: parameter, x6:bias_data
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/*Compute Convolution*/
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ld1 {v16.4s}, [x6]
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//x7: weight_y_step
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ldr x7, [x5, #16]
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//x8: dilate_x_step
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ldr x8, [x5, #24]
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//x9:dilate_y_step
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ldr x9, [x5, #32]
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mul x12, x8, x3
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sub x9, x9, x12
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//sizeof(int16_t)*4
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mov x12, #8
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mul x12, x3, x12
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sub x7, x7, x12
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LoopFy:
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mov x10, x3
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LoopFx:
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ld1 {v0.4h}, [x1], x8
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ld1 {v1.4h}, [x2], #8
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smlal v16.4s, v0.4h, v1.4h
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subs x10, x10, #1
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bne LoopFx
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subs x4, x4, #1
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add x1, x1, x9
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add x2, x2, x7
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bne LoopFy
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/*Compute Convolution End*/
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/*Compute multi and relu*/
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//x7: output_multiplier
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add x5, x5, #48
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ld1 {v0.s}[0], [x5], #4
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//x8: output_shift_before
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ld1 {v0.s}[1], [x5], #4
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dup v21.4s, v0.s[0]
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dup v22.4s, v0.s[1]
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//x8: output_shift_after
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ld1 {v1.s}[1], [x5], #4
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sqrdmulh v16.4s, v16.4s, v21.4s
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//x9: output_offset
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ld1 {v0.s}[2], [x5], #4
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sqshl v16.4s, v16.4s, v22.4s
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dup v23.4s, v1.s[1]
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//x10: output_activation_min
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ld1 {v0.s}[3], [x5], #4
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sqrshl v16.4s, v16.4s, v23.4s
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//x11: output_activation_max
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ld1 {v1.s}[0], [x5], #4
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dup v20.4s, v0.s[2]
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dup v22.4s, v0.s[3]
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add v16.4s, v16.4s, v20.4s
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dup v21.4s, v1.s[0]
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smax v16.4s, v22.4s, v16.4s
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smin v16.4s, v21.4s, v16.4s
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sqxtn v16.4h, v16.4s
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uqxtn v16.8b, v16.8h
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st1 {v16.s}[0], [x0]
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ret
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#endif
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