wehub-resource-sync
216 lines
3.7 KiB
ArmAsm
216 lines
3.7 KiB
ArmAsm
//
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// MNNAvgPoolInt8.s
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// ALL_BUILD
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//
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// Created by MNN on 2023/1/9.
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// Copyright © 2018, Alibaba Group Holding Limited
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//
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#ifdef __aarch64__
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#include "MNNAsmGlobal.h"
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.text
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.align 5
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asm_function MNNAvgPoolInt8
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// void MNNAvgPoolInt8(int8_t* dst, int8_t* src, size_t outputWidth, size_t inputWidth, size_t kernelx, size_t kernely,
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// size_t stridesx, ssize_t paddingx, ssize_t factor);
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// Auto load: x0: dst, x1: src, x2: outputWidth, x3: inputWidth, x4: kernelx, x5: kernely, x6: stridesx, x7: paddingx
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// Load from sp:
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// w8: factor
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ldr x8, [sp, #0]
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dup v24.4s, w8
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stp d14, d15, [sp, #(-16 * 4)]!
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stp d12, d13, [sp, #16]
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stp d10, d11, [sp, #32]
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stp d8, d9, [sp, #48]
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cmp x4, #0
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ble END
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cmp x5, #0
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ble END
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mov x8, #16
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mul x8, x8, x6 // x8: 16*stridesx
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mov x9, #16
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mul x9, x9, x3 // x9: 16*inputWidth
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cmp x2, #2
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blt L1Loop
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/*L2Loop */
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L2Loop:
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movi v0.4s, #0
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movi v1.4s, #0
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movi v2.4s, #0
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movi v3.4s, #0
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movi v7.4s, #0
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movi v8.4s, #0
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movi v9.4s, #0
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movi v10.4s, #0
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mov x10, x5 // x5: kernely
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mov x13, x1
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add x14, x13, x8
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Loop2Y:
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mov x7, x4 // x4: kernelx
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mov x3, x13
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mov x11, x14
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Loop2X:
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ld1 {v4.4s}, [x3], #16
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ld1 {v11.4s}, [x11], #16
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sxtl v5.8h, v4.8b
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sxtl2 v6.8h, v4.16b
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sxtl v12.8h, v11.8b
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sxtl2 v13.8h, v11.16b
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saddw v0.4s, v0.4s, v5.4h
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saddw2 v1.4s, v1.4s, v5.8h
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saddw v2.4s, v2.4s, v6.4h
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saddw2 v3.4s, v3.4s, v6.8h
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saddw v7.4s, v7.4s, v12.4h
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saddw2 v8.4s, v8.4s, v12.8h
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saddw v9.4s, v9.4s, v13.4h
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saddw2 v10.4s, v10.4s, v13.8h
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sub x7, x7, #1 // x7: kernelx
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cmp x7, #0
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bne Loop2X
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EndLoop2X:
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add x13, x13, x9
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add x14, x14, x9
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sub x10, x10, #1 // x10: kernely
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cmp x10, #0
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bne Loop2Y
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EndLoop2Y:
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mul v0.4s, v0.4s, v24.4s
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mul v1.4s, v1.4s, v24.4s
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mul v2.4s, v2.4s, v24.4s
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mul v3.4s, v3.4s, v24.4s
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mul v7.4s, v7.4s, v24.4s
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mul v8.4s, v8.4s, v24.4s
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mul v9.4s, v9.4s, v24.4s
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mul v10.4s, v10.4s, v24.4s
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sshr v0.4s, v0.4s, #24 // shift right
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sshr v1.4s, v1.4s, #24
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sshr v2.4s, v2.4s, #24
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sshr v3.4s, v3.4s, #24
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sshr v7.4s, v7.4s, #24
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sshr v8.4s, v8.4s, #24
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sshr v9.4s, v9.4s, #24
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sshr v10.4s, v10.4s, #24
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sqxtn v0.4h, v0.4s
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sqxtn2 v0.8h, v1.4s
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sqxtn v1.4h, v2.4s
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sqxtn2 v1.8h, v3.4s
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sqxtn v2.4h, v7.4s
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sqxtn2 v2.8h, v8.4s
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sqxtn v3.4h, v9.4s
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sqxtn2 v3.8h, v10.4s
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sqxtn v0.8b, v0.8h
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sqxtn2 v0.16b, v1.8h
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sqxtn v1.8b, v2.8h
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sqxtn2 v1.16b, v3.8h
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st1 {v0.16b, v1.16b}, [x0], #32
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mov x3, #2
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mul x3, x3, x8 // x3: 2* 16* strides
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add x1, x1, x3
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sub x2, x2, #2 // x2: OutputWidth
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cmp x2, #2
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bge L2Loop
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cmp x2, #0
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beq END
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/*L1Loop */
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L1Loop:
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movi v0.4s, #0
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movi v1.4s, #0
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movi v2.4s, #0
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movi v3.4s, #0
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mov x10, x5 // x5: kernely
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mov x13, x1
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Loop1Y:
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mov x7, x4 // x4: kernelx
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mov x3, x13
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Loop1X:
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ld1 {v4.4s}, [x3], #16
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sxtl v5.8h, v4.8b
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sxtl2 v6.8h, v4.16b
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saddw v0.4s, v0.4s, v5.4h
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saddw2 v1.4s, v1.4s, v5.8h
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saddw v2.4s, v2.4s, v6.4h
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saddw2 v3.4s, v3.4s, v6.8h
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sub x7, x7, #1 // x7: kernelx
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cmp x7, #0
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bne Loop1X
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EndLoop1X:
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add x13, x13, x9
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sub x10, x10, #1 // x10: kernely
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cmp x10, #0
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bne Loop1Y
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EndLoop1Y:
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mul v0.4s, v0.4s, v24.4s
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mul v1.4s, v1.4s, v24.4s
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mul v2.4s, v2.4s, v24.4s
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mul v3.4s, v3.4s, v24.4s
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sshr v0.4s, v0.4s, #24 // shift right
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sshr v1.4s, v1.4s, #24
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sshr v2.4s, v2.4s, #24
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sshr v3.4s, v3.4s, #24
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sqxtn v0.4h, v0.4s
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sqxtn2 v0.8h, v1.4s
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sqxtn v1.4h, v2.4s
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sqxtn2 v1.8h, v3.4s
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sqxtn v0.8b, v0.8h
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sqxtn v1.8b, v1.8h
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st1 {v0.8b, v1.8b}, [x0], #16
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mov x3, #1
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mul x3, x3, x8 // x3: 16* strides
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add x1, x1, x3
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sub x2, x2, #1 // x2: OutputWidth
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cmp x2, #1
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bge L1Loop
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cmp x2, #0
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beq END
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END:
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ldp d8, d9, [sp, #48]
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ldp d10, d11, [sp, #32]
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ldp d12, d13, [sp, #16]
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ldp d14, d15, [sp], #(16 * 4)
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ret
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#endif |