wehub-resource-sync
116 lines
2.0 KiB
ArmAsm
116 lines
2.0 KiB
ArmAsm
//
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// MNNAvgPoolInt8.s
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// ALL_BUILD
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//
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// Created by MNN on 2023/1/9.
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//
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#ifdef __arm__
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#ifndef __aarch64__
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#include "MNNAsmGlobal.h"
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.text
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.align 5
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asm_function MNNAvgPoolInt8
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// void MNNAvgPoolInt8(int8_t* dst, int8_t* src, size_t outputWidth, size_t inputWidth, size_t kernelx, size_t kernely,
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// size_t stridesx, ssize_t paddingx, ssize_t factor);
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// Auto load: r0: dst, r1: src, r2: outputWidth, r3: inputWidth
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// r4: kernelx, r5: kernely, r7: stridesx, r8: paddingx, lr: factor
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push {r4-r8, r10-r12, lr}
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ldr r4, [sp, #36]
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ldr r5, [sp, #40]
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ldr r7, [sp, #44]
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ldr r8, [sp, #48]
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ldr lr, [sp, #52] // lr: factor
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vpush {q4-q6}
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vdup.32 q4, lr
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cmp r4, #0
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ble END
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cmp r5, #0
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ble END
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mov r11, #16
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mul r11, r11, r7 // r11: 16*stridesx
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mov lr, #16
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mul lr, lr, r3 // lr: 16*inputWidth (16: channel pack)
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L1:
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/*L1Loop */
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L1Loop:
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vmov.i32 q0, #0
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vmov.i32 q1, #0
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vmov.i32 q2, #0
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vmov.i32 q3, #0
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mov r12, r5 // r5: kernely
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mov r6, r1
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Loop1Y:
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mov r8, r4 // r4: kernelx
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mov r3, r6
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Loop1X:
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vld1.8 {q12}, [r3]! //q12: int8x16
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vmovl.s8 q13, d24 //q13: int16x8, d24: int8x8
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vmovl.s8 q14, d25
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vaddw.s16 q0, q0, d26 //d26: int16x4
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vaddw.s16 q1, q1, d27
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vaddw.s16 q2, q2, d28
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vaddw.s16 q3, q3, d29
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sub r8, r8, #1 // r8: kernelx
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cmp r8, #0
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bne Loop1X
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EndLoop1X:
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add r6, r6, lr // lr: 16*inputWidth
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sub r12, r12, #1 // r12: kernely
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cmp r12, #0
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bne Loop1Y
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EndLoop1Y:
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vmul.s32 q0, q0, q4
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vmul.s32 q1, q1, q4
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vmul.s32 q2, q2, q4
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vmul.s32 q3, q3, q4
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vshr.s32 q0, q0, #24
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vshr.s32 q1, q1, #24
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vshr.s32 q2, q2, #24
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vshr.s32 q3, q3, #24
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vqmovn.s32 d0, q0
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vqmovn.s32 d1, q1
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vqmovn.s32 d2, q2
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vqmovn.s32 d3, q3
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vqmovn.s16 d0, q0
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vqmovn.s16 d1, q1
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vst1.8 {q0}, [r0]!
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mov r3, #1 // #1: Computer only one width_point each time.
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mul r3, r3, r11 // r3: 16* stridesx
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add r1, r1, r3
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sub r2, r2, #1 // r2: OutputWidth
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cmp r2, #0
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beq END
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cmp r2, #1
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bge L1Loop
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END:
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vpop {q4-q6}
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pop {r4-r8, r10-r12, pc}
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#endif
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#endif |